Groupe d’études et de recherche en analyse des décisions

Building energy-efficient AI chips by exploiting energy-reliability tradeoffs

François Leduc-Primeau Polytechnique Montréal, Canada

François Leduc-Primeau

Présentation sur YouTube

For the last ten years or so, the energy efficiency of CMOS integrated circuits has been improving only slowly, even though the size of transistors on the chip continues to decrease. In order to continue improving the capabilities of digital systems, it is crucial to improve their energy efficiency. Many approaches have been proposed, such as near-threshold CMOS circuits or “processing in memory” architectures, but these approaches all have in common that they make it more difficult to control the reliability of the fabricated circuits. In communications, we know since the seminal work of Claude Shannon that adding redundancy to a message allows to greatly reduce the energy needed to communicate it across a noisy channel. In this talk, we will discuss ways in which this approach can be carried over to digital systems, with the objective of building artificial intelligence systems that achieve energy efficiency comparable to human intelligence.

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